The National Institute for Computational Sciences

Nano Nano

Researchers model next-generation transistors on Kraken

by Gregory Scott Jones

Examples of next-generation nanotransistors to be simulated by OMEN

(a) Single-Gate and Double-Gate Ultra-Thin-Body field-effect transistor (FET) made of Si, Ge, or III-V semiconductors; (b) Gate-All-Around Nanowire FET; (c) Graphene Nanoribbon FET; and (d) Coaxially-Gate Carbon Nanotube FET.

Anyone who has ever bought a laptop knows that time is not kind. The latest and greatest to hit the market is little more than a boat anchor 3 years down the road thanks to Moore’s Law. Named after Intel founder Gordon Moore, this “law,” which states that computers and various other electronic technologies double in speed every 18 months, has held steady for more than four decades. Now, however, the end may be in sight.

The number of transistors that can fit onto a modern computer chip may soon reach the limit, and the usual materials have been pushed to their performance peak. If Moore’s Law is to continue to hold true, a technological revolution of some sort is necessary. Supercomputers are preparing engineers for battle.

In a daunting effort to continue consumer headaches and technology’s amazing progression of power, researchers from Purdue University are using Kraken, a Cray XT5 supercomputer funded by the National Science Foundation, managed by the University of Tennessee, and located at the National Institute for Computational Sciences (NICS) at Oak Ridge National Laboratory, to model next-generation transistor devices; nanotubes, nanoribbons, nanowires, and a special type of nanotransistor known as a band-to-band tunneling field-effect transistor (TFET) are all being explored.

These immensely powerful—but tiny—technologies are on the order of 10 nanometers, or billionths of a meter, in size, or approximately 5,000 times smaller than a human hair. Ironically, they are being simulated on one of the world’s largest and most powerful computers. “We are currently building simulated transistors atom by atom on Kraken,” said Mathieu Luisier, an assistant research professor at the Network for Computational Nanotechnology at Purdue University and the principal investigator for the project.

Luisier works with the Klimeck research group, headed by Gerhard Klimeck, the director of the Network for Computational Nanotechnology at Purdue University and a professor of electrical and computer engineering. The group heavily leverages resources, a cyberinfrastructure that offers online simulation tools, among them a basic version of OMEN.

Using Kraken and other supercomputers, the team wants to create an atomistic description of all types of possible future transistors. These virtual electronic devices will ultimately play a major role in the manufacturing of the real things a few years down the line.

“Manufacturing costs time and money,” said Luisier. By simulating these devices beforehand, the development cost will almost certainly be significantly reduced, bringing a new era of technology to the marketplace faster. These simulations will ultimately help engineers optimize possible transistor designs, revealing the most effective shapes, materials, and other relevant properties. “We want to have a good understanding of each transistor type before the manufacturing process begins,” said Luisier.

The team most recently used Kraken to model TFETs in hopes of making tomorrow’s computer chips more efficient and, coincidentally, more powerful. Smaller transistors may mean more powerful computer chips that consume less overall power—a theoretical win-win situation. The chips will most likely remain the same size, but the number of transistors that can fit on them will grow significantly, thus increasing the power of the overall chip.

Using a code developed by Luisier known as OMEN, the first 3-D, atomistic, quantum transport simulator, the team is simulating the injection of electrons into and out of a device and computing the current that flows through. By doing this with different device designs, they can get a feel for those with the best potential and, they hope, bring them to market faster and cheaper. So far the team has used more than 5 million processor hours in their effort to model TFETs.

Shocking the gatekeeper

Like a light bulb, transistors are characterized by two states: OFF, in which there is very low current except for some unavoidable static leakage, and ON, in which current is free to flow and power your computer, iPod, etc. To switch from the OFF state to the ON state, a voltage is applied to a gate that regulates current through the transistor. Obviously, when it comes to energy efficiency, the lower the applied voltage the better, and that is where TFETs promise to make their presence felt.

In traditional silicon metal-oxide-semiconductor field-effect transistors (MOSFETs), a 60-millivolt increase in voltage must be applied to the gate to increase the current through the transistor by one order of magnitude. This relationship is known as the “slope” between the OFF and ON states of the transistor. In a TFET, however, the slope could possibly be smaller than 20 millivolts, meaning that to increase the current through the transistor by one order of magnitude, you would need only one-third (or possibly less) the supply voltage, corresponding to nearly ten times less power consumption. “If you need less voltage to switch your transistor from its OFF to its ON state, you burn less power, and it’s a huge benefit,” said Luisier.

The reduction of the slope in TFETs is possible due to the different natures of the currents in MOSFETs and TFETs. MOSFETs employ a thermionic current (i.e., the current flows over a potential barrier whose height is determined by the voltage applied to the gate). In TFETs, however, the electrons “tunnel” between the regions responsible for activating current in a transistor. The gate is still active, but instead of acting as a barrier, it simply determines the probability that electrons will be able to tunnel effectively from the source and drain contacts, the necessary step in increasing current. Essentially, by regulating a very strong barrier and tunneling between the zones on the transistor, TFETs save energy across many transistors.

Take a machine the size of Kraken, for example. With more than 16,000 AMD Opteron processors each containing more than a hundred million transistors, the potential economic impact of TFETs (or any other energy-efficient device) is tremendous. And while their manufacture and deployment is years away at best, the justification for their exploration becomes obvious with a little simple math. “Ask the people at NICS whether they would be happy to decrease their electricity bill by a factor of two or more because their CPUs need less power but still exhibit the same performance. That’s the idea behind TFETs,” said Klimeck, adding that “without machines like Kraken, we couldn’t simulate these structures,”

Because OMEN will scale to the entire machine, and Kraken is the sixth fastest computer in the world, the simulations can be conducted faster and can more realistically simulate larger structures. Whereas a university cluster might simulate an unrealistically small 1-nanometer-diameter nanowire, Kraken can get the same detail for a more realistically extended 10-nanometer device. And as supercomputers increase in power, the OMEN team will be ready to ramp up its simulations. Luisier has evidence that OMEN will scale to 200,000 or more cores when such machines become available, giving engineers an even better idea of where to concentrate their efforts when it comes to the tiny transistors that will literally revolutionize tomorrow’s technology.

“With OMEN we are able to directly compare all of the possibilities,” he said, adding that as of now, it’s not clear which type of nanotransistor design will emerge victorious and find its way into that new laptop you’ll be eyeing in a few years. But one thing is clear: OMEN will be instrumental in identifying the winner.